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 ICS671-06
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Description
The ICS671-06 is a low phase noise, high-speed PLL-based, 8 output, low skew zero delay buffer. Based on ICS' proprietary low jitter Phase-Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. ICS manufactures the largest variety of clock generators and buffers and is the largest clock supplier in the world.
Features
* * * * * * * * * * * * *
Clock outputs from 10 to 133 MHz Zero input-output delay Eight low skew (<200 ps) outputs Device-to-device skew <700 ps Low jitter (<200 ps) Full CMOS outputs with 25 mA output drive capability at TTL levels 5 V tolerant FBIN and CLKIN pins Tri-state mode for board-level testing Advanced, low power, sub-micron CMOS process Operating voltage of 3.3 V Industrial temperature range available Packaged in 16-pin SOIC Available in Pb (lead) free package
Not recommended for new designs. See the MK2308-1H for new designs.
Block Diagram
VDD 2 2 Control Logic
S2, S1
CLKA1 CLKA2
CLKIN
CLKA3 CLKA4
FBIN
Clock Synthesis PLL
1
0
CLKB1 CLKB2 CLKB3 CLKB4
GND
2
Feedback is shown from CLKB4 for illustration, but may come from any output.
MDS 671-06 D In te grated Circui t Systems
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ICS671-06 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Pin Assignment
C L K IN C LKA1 C LKA2 VDD GND C LKB1 C LKB2 S2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 F B IN CLKA4 CLKA3 VDD GND CLKB4 CLKB3 S1
1 6 p in n a rro w (1 5 0 m il) S O IC a n d 1 6 p in (1 7 3 m il ) T S S O P
Output Clock Mode Select Table
S2 0 0 1 1 S1 0 1 0 1 CLKA1:A4 Tri-state (note 1) Running Running Running CLKB1:B4 Tri-state (note 1) Tri-state (note 1) Running Running A & B Source PLL PLL CLKIN (note 2) PLL PLL Status OFF ON OFF ON
Note 1. Outputs are in high impedance state. Note 2. Buffer mode only; not zero delay between input and output.
Pin Descriptions
Pin Number 1 2 - 3, 14 - 15 4 5 6 - 7, 10 - 11 8 9 12 13 16 Pin Name CLKIN CLKA1:A4 VDD GND CLKB1:B4 S2 S1 GND VDD FBIN Pin Type Input Output Power Power Output Input Input Power Power Input Clock input. Clock outputs A1:A4. See table above. Power supply. Connect to 3.3 V. Connect to ground. Clock outputs B1:B4. See table above. Select input 2. See table above. Internal pull-up. Select input 1. See table above. Internal pull-up. Connect to ground. Power supply. Connect to 3.3 V. Feedback input. Connect to any output under normal operation. Pin Description
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ICS671-06 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
External Components
The ICS671-06 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01F should be connected between VDD and GND on pins 4 and 5, and VDD and GND on pins 13 and 12, as close to the device as possible. A series termination resistor of 33 may be used to each clock output pin to reduce reflections.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS671-06. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs CLKIN and FBIN inputs Electrostatic Discharge Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V -0.5 V to 5.5 V 2000 V -40 to +85C -65 to +150C 150C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
-40 +3.0
Typ.
Max.
+85 +3.6
Units
C V
DC Electrical Characteristics
VDD=3.3 V 5%, Ambient temperature -40 to +85C, unless stated otherwis
Parameter
Operating Voltage Input High Voltage Input Low Voltage Input Low Current Input High Current
Symbol
VDD VIH VIL IIL IIH
Conditions
Min.
3.0 2
Typ.
Max.
3.6 0.8
Units
V V V mA uA
VIN = 0V VIN = VDD
50 100
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ICS671-06 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Parameter
Output High Voltage Output Low Voltage Output High Voltage, CMOS level Operating Supply Current Power Down Supply Current Short Circuit Current Input Capacitance
Symbol
VOH VOL VOH IDD IDD IOS CIN
Conditions
IOH = -12 mA IOL = 12 mA IOH = -12 mA No Load, S2 = 1, S1 = 1, Note 1 CLKIN = 0, S2 = 0, S1 = 1 CLKIN = 0, Note 2 Each output S2, S1, FBIN
Min.
2.4
Typ.
Max.
0.4
Units
V V V
VDD-0.4 35 12 12 50 5
mA A A mA pF
AC Electrical Characteristics
VDD = 3.3 V 5%, Ambient Temperature -40 to +85C, CLOAD at CLK = 15 pF, unless stated otherwise
Parameter
Input Clock Frequency Output Clock Frequency Output Rise Time Output Fall Time Output Clock Duty Cycle Device to Device Skew Output to Output Skew Input to Output Skew Maximum Absolute JItter Cycle to Cycle Jitter
Symbol
fIN tOR tOF tDC
Conditions
See table on page 2 See table on page 2 0.8 to 2.0 V, CL = 30 pF 2.0 to 0.8 V, CL = 30 pF Measured at VDD/2 Rising edges at VDD/2 Rising edges at VDD/2 Rising edges at VDD/2, FBIN to CLKA4, S1 = 1, S0 = 1, Note 1
Min.
10 10
Typ.
Max. Units
133 133 2.5 2.5 MHz MHz ns ns % ps ps ps ps ps ps ps ms
45
50
55 700 200 250
130 30 pF, measured at 66.67M 15 pF, measured at 66.67M 15 pF, measured at 133.33M
200 200 200 100 1.0
PLL Lock Time
Note 3
Note 1: With CLKIN = 100MHz, FBIN to CLKA4, all outputs at 100 MHz. Note 2: When there is no clock signal present at CLKIN, the ICS671-06 will enter power down mode. The PLL is stopped and the outputs are tri-state. Note 3: With VDD at a steady rate and valid clocks at CLKIN and FBIN.
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ICS671-06 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Thermal Characteristics (16 pin SOIC)
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
120 115 105 58
Max. Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
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Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters Symbol Min Max Inches Min Max
16
E INDEX AREA
H
12 D
A A1 B C D E e H h L
1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8
.0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .3859 .3937 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8
A A1
h x 45 C
-Ce
B SEATING PLANE L
.10 (.004)
C
Ordering Information
Part / Order Number
ICS671M-06I ICS671M-06IT ICS671M-06ILF ICS671M-06ILFT
Marking
ICS671M-06I ICS671M-06I ICS671M-06IL ICS671M-06IL
Shipping Packaging
Tubes Tape and Reel Tubes Tape and Reel
Package
16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC
Temperature
-40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
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